So far we got the 68HC11 running and we have even
written a small program, but let's face it the
internal 256 bytes of RAM are not enough. One of the reasons to choose 68HC11 is
the ability to connect external RAM and ROM so let's do it. I designed this
extension board, which can easily be plugged into the basic board using several
flat ribbon cables. Again I wanted to include mote things on the board, but the
single layer routing was a great constraint.
I got a couple of HM628128A ICs laying around, so that is the SRAM module used
in the schematics, technically you can use any SRAM module, as well as it is
fast enough (most of them are) and it works with 5V. The memory module used here
is 128k, if you have memory with smaller size, just skip the higher bits of the
Axx buss.
The MCU is capable of addressing only 64k directly, so I have the A16 signal put
on an external connector - for the moment I simply connected the signal to the
ground, so practically I use only the lower 64k of the RAM chip.
I also have Address IN and Address Out connectors, so I can daisy chain more
than one board. Same goes for Data IN and Data OUT connectors, as well as
several control signals and the Power.
I used quite a number of TTL logic ICs, the design can be optimized quite a lot,
but that was not the goal.
Quick description:
J5 and J2 are DataIn and DataOut connectors, both 8-bit. If you don't plan
adding more extension boards, you can use only one of these connectors.
J1 is A0..A7 output - this is used for future extensions only.
J4 and J6 are A8..A15 In and Out, again the Out is used only for future
extensions.
J7 and J8 are in and Out for the CPU bus control signals. The #RD and #WR
are derived from E and R/W and AS is used to de-multiplex the combined
A0..A7/D0..D7 bus.
J16 is used for future extensions. It can route the #RD and #WR signals to
another board. The FLASH input is also on this connector. For the moment I
connect the FLASH signal to the GND using a jumper on J16, between pins 3 and
4. The FLASH signal is active 1 and is used to disable all devices from this
board from accessing the CPU bus during Flash programming. Note the Flash
device is planned for the future.
J9 and J10 are power connectors.
J12 can be used to connect the A16 of the RAM device to external control.
Since Bank switching is not a easy task, I simply connect the A16 to GND via
jumper on J12 between pin 2 and 3.
J9 is the output of the IO address decoder. Each IO "slot" is 512 bytes
wide. IO space starts from $C000 and ends $CFFF. The IO_C0 maps to $C000,
IO_C1 maps to $C200 and so forth. The IO_C7 maps to $CE00. The IO_C7 is used
to address the LCD port.
RAM addresses are from 0 to $BFFF. However the internal RAM at address
0..FF takes precedence as well as the peripheral registers and boot ROM (if we
are in "boot mode") . Useable RAM space is from $2000 to $BEFF
J13 is the LCD IO port. This is specially designed to address 2 character
based Hitachi controllers. I happen to have a 40x4 device which is implemented
as dual 20x2 controllers. If you want to use only single LCD controller, use
all the signals except LCD_E2. Connect LCD_E1 to the E signal of the LCD
controller IC. Each LCD controller maps to two consecutive addresses in the IO
space.
J14 is used to attach external LCD contrast control circuit.
Here is a sample program which I used to test the LCD
interface. It is compiled and loaded in the external RAM.
